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usr
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include
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c++
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4.8.2
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x86_64-redhat-linux
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32
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bits
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// Low-level type for atomic operations -*- C++ -*- // Copyright (C) 2004-2013 Free Software Foundation, Inc. // // This file is part of the GNU ISO C++ Library. This library is free // software; you can redistribute it and/or modify it under the // terms of the GNU General Public License as published by the // Free Software Foundation; either version 3, or (at your option) // any later version. // This library is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // Under Section 7 of GPL version 3, you are granted additional // permissions described in the GCC Runtime Library Exception, version // 3.1, as published by the Free Software Foundation. // You should have received a copy of the GNU General Public License and // a copy of the GCC Runtime Library Exception along with this program; // see the files COPYING3 and COPYING.RUNTIME respectively. If not, see // <http://www.gnu.org/licenses/>. /** @file atomic_word.h * This file is a GNU extension to the Standard C++ Library. */ #ifndef _GLIBCXX_ATOMIC_WORD_H #define _GLIBCXX_ATOMIC_WORD_H 1 typedef int _Atomic_word; // Define these two macros using the appropriate memory barrier for the target. // The commented out versions below are the defaults. // See ia64/atomic_word.h for an alternative approach. // This one prevents loads from being hoisted across the barrier; // in other words, this is a Load-Load acquire barrier. // This is necessary iff TARGET_RELAXED_ORDERING is defined in tm.h. // #define _GLIBCXX_READ_MEM_BARRIER __asm __volatile ("":::"memory") // This one prevents stores from being sunk across the barrier; in other // words, a Store-Store release barrier. // #define _GLIBCXX_WRITE_MEM_BARRIER __asm __volatile ("":::"memory") #endif